(Ph.D.) in Electrical Engineering, KAIST, Korea. (1996)
약력/경력
Senior Design Engineer, LG Semicon Co. (Currently Hynix Semiconductor Co.), Korea
학술지 논문
(2023)
CMOS Clock-Gated Synchronous Up/Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-Flop.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS.
70,
12
(2022)
Energy-and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS.
69,
9
(2021)
How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS.
68,
12
(2021)
In-sensor reservoir computing for language learning via two-dimensional memristors.
SCIENCE ADVANCES.
7,
20
(2019)
Self-selective van der Waals heterostructures for large scale memory array.
NATURE COMMUNICATIONS.
10,
-
(2019)
A Fast Response PWM Buck Converter With Active Ramp Tracking Control in a Load Transient Period.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS.
66,
3
(2018)
Charge sharing write driver and half-V-DD pre-charge 8T SRAM with virtual ground for low-power write and read operation.
IET CIRCUITS DEVICES & SYSTEMS.
12,
1
(2017)
A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface.
IEEE JOURNAL OF SOLID-STATE CIRCUITS.
52,
6
(2017)
Widely Tunable Adaptive Resolution-controlled Read-sensing Reference Current Generation for Reliable PRAM Data Read at Scaled Technologies.
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE.
17,
3
(2017)
10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS.
25,
4
(2017)
Conditional-Boosting Flip-Flop for Near-Threshold Voltage Application.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS.
25,
2
(2016)
Ultra-fast Adaptive Frequency-controlled Hysteretic Buck Converter for Portable Devices.
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE.
16,
5
(2016)
Continuous-time ΔΣ modulator having time-interleaved switched-capacitor brief-return-to-zero DAC with first-order jitter noise shaping.
ELECTRONICS LETTERS.
52,
11
(2016)
Double-sampled ΔΣ modulator with 1.5-bit FIR feedback DAC for reduced noise folding and increased power efficiency.
ELECTRONICS LETTERS.
52,
8
(2016)
Current-Integrating DFE with Sub-UI ISI Cancellation for Multi-Drop Channels.
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE.
16,
1
(2015)
Bootstrapped ring oscillator with feedforward inputs for ultra-low-voltage application.
IEICE ELECTRONICS EXPRESS.
12,
23
(2015)
Multi-Channel Audio CODEC with Channel Interference Suppression.
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE.
15,
6
(2015)
Adaptive Digital Background Gain Mismatch Calibration for Multi-lane High-speed Serial Links.
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE.
15,
1
특허/프로그램
벅 컨버터.
10-2019-0017455.
20210209.
대한민국
메모리 장치 및 판독 방법.
10-2017-0119754.
20191125.
대한민국
Flip-flop and driving method thereof.
16/010,758.
20190326.
미국
가변 기준전압을 가진 판정 궤환 등화기.
10-2016-0098972.
20190213.
대한민국
Delta-Sigma Modulator.
15/784,642.
20181204.
미국
플립플롭 및 그 구동 방법.
10-2017-0076941.
20180712.
대한민국
판정 궤환 등화기.
10-2016-0134649.
20171123.
대한민국
Delta Sigma Modulator for shaping noise and audio codec having the same.
15/097715.
20170822.
미국
델타-시그마 변조기.
10-2016-0134650.
20170525.
대한민국
전압 감지 증폭기.
10-2016-0067615.
20170428.
대한민국
링 오실레이터.
10-2016-0082628.
20170316.
대한민국
Clock gated circuit and digital system having the same.
13/440,007.
20151215.
미국
CMOS differential logic circuit using voltage boosting technique.
13/770,546.
20141209.
미국
저항 변화를 보상한 밴드갭 기준전압 발생기.
2012-0052677.
20140220.
대한민국
전압 부스팅 기법을 이용한 CMOS 차동 로직 회로.
10-2012-0139895.
20131209.
대한민국
Input/output circuit and integrated circuit apparatus including the same.
12/714,878.
20110823.
미국
Apparatus for outputting complementary signals using bootstrapping technology.
12/367,398.
20110419.
미국
Semiconductor device for charge pumping.
12/458,533.
20110419.
미국
수상/공훈
Best paper award, IEEE SSCS/EDS Seoul Chapter, Korea, 2002.
The most excellent design paper award in ASP-DAC, Japan, 199
학술회의논문
(2016)
Crosstalk Cancellation for Frame Memory Bus on TV Main Boards.
IEEE International Conference on Consumer Electronics.
독일
(2016)
A Charge-Recycling DC-DC Buck Converter with Adaptive Gate Voltage Swing.
ICEIC.
베트남
(2015)
Adaptive Digital Gain and Offset Calibration for High-Speed Parallel Links.
ICCCS.
대한민국
(2015)
Bootstrapped Double-Tail Latch-Type Voltage Sense Amplifier for Ultralow Voltage Application.
ICCCS.
대한민국
(2015)
A 5.8Gb/s Adaptive Integrating Duobinary-Based DFE Receiver for Multi-Drop Memory Interface.
IEEE ISSCC.
미국
(2014)
A low-noise and low-power voltage-controlled oscillator.
IEEE MWSCAS.
미국
(2014)
A 5-tap Half-rate DFE Receiver for Data-Edge Simultaneous Equalization.
International Conference on Circuits, Systems, Communications and Computers.
그리스
(2014)
On-chip Process Corner and In-die Local Mismatch Detections Using Stacked Switching Transistor-based Buffer Ring.
ITC-CSCC.
태국
(2014)
Fast Transient Response PWM Buck Converter with Duty Ratio-Based Dual-Mode Control.
IIISC.
태국
(2014)
Fast Response Voltage-Regulated PWM Buck Converter with Reference Voltage Control.
ICEIC.
말레이시아
(2013)
A highly accurate current bias generator with adaptive resolution control for phase-change random access memory.
ITC-CSCC.
대한민국
(2013)
A Fast-Locking Wide-Range DLL with Initial Locking Phase Selection.
ICEIC.
말레이시아
(2012)
Adaptive Frequency-Controlled Ultra-Fast Hysteretic Buck Converter for Portable Devices.
International SoC Design Conference.
대한민국
